A number of Mazdas (and some Fords) used Mazda's MECS-II (Mazda Engine Control System) PCME ("PCM" from the early 1990s until the widespread adoption of the more advanced OBD-II box in the 1996 model year.
The MECS-II PCM is a two-board architecture, linked by 4 flexible wire connectors. One board, the "analog" board, serves the PCMs analog and I/O functions while the second board, the digital board, contains all the processor, memory, digital-level I/O and so on.
Since the main focus of this site and the main interest of the average reader is likely the digital side of things, I'll start with that. The processor is a Nippon Denso marked with "151802-8050". Turns out this processor is based on a Motorola 68HC11 core. The processor is housed in an 84-pin plastic quad and is internally expanded: much like an HC11F1, the package brings out the 16-bit address and 8-bit data busses. The processor is clocked by an 8MHz crystal yielding an internal bus clock of 2MHz. Much of the HC11-based feature set is preserved (input captures, output compares, SPI), some appears eliminated (SCI) and some modified (A/D converter). In addition, there are registers mapped to addresses I've not been able to find literature on or if I have found them, the documented function doesn't appear to match the function as it appears in the code.
The processor itself appears to house 512-bytes of internal RAM of which the first 32-bytes ($00-$1F) are battery backed during ignition-off. Here, learned parameters for fuel, idle control and TPS closed-position are stored. Detection of corrupted memory is performed by storing the compliment of each parameter in the adjacent byte. So, if the parameter at $00 is #$AA, the value stored at $01 is #$55. During boot, the PCM will check each location and its compliment. If a bit has drifted due to battery-disconnect, the PCM resets the whole 32-byte region to default values.
The processor has an on-board A/D but in this case, it's a 10-bit unit. It seems to have a unique set of addresses, different from, say, the HC11E9. The result registers are 16-bits wide and the A/D value is left-justified. In the code, very often the raw A/D value is right-shifted (e.g. LSRD) 6-bits to bring the result to a "usable" bit position.
The system uses 3 of the output compares to drive 3 of the fuel injector drivers. The remaining 3 injectors (V6) are driven by a peripheral timer chip (Hitachi 63B40). Another output compare is used to drive the igniter (coil driver) for the ignition. Input captures are used for the camshaft position sensor and two crankshaft position sensors.
The processor also contains a couple of PWM outputs that are used to modulate the idle air control and EGR solenoids.
External chips include the aforementioned 63B40, a 63B21 parallel interface, a 27C256 PROM for code and calibration storage (mapped to $8000-$FFFF), a 5564 1K RAM and some inconsequential logic ('138, '74 etc) for address decoding. There's also a 4051 analog multiplexer that feeds one A/D channel a number of low-criticality A/D inputs. A 74HC541 provides buffering for some more inputs.
An interesting function of the SPI: a 74HC595 shift register and a resistor ladder form a crude but effective D/A converter that is used to help determine the severity (amplitude) of the signal from the knock sensor. A separate pulse accumulator is used to count the frequency of knock events.
Sadly, the SCI, if populated on the silicon, is not used, therefore a great opportunity lost for serial interfacing. Odd that Mazda would not choose to have serial communications, even as late as 1995, on a wide range of their model line...
Next post, if you're interested, I'll look at some of the code.